Dileep Bhandarkar is an innovative and accomplished leader with an extensive career of success within technology leadership roles.

Since 2019 he is an independent consultant, leveraging his proven ability to analyze technology architecture, direct strategic initiatives to improve, update and upgrade to achieve efficiency and productivity.

Until 2019 - Vice President, Technology in the Data Center Group at Qualcomm: working on technology strategy and business development for ARM based servers; technical lead for the formation of Qualcomm’s China joint venture (HXT).

He was Distinguished Engineer at Microsoft responsible for Cloud Server Hardware and datacenter Infrastructure for Global Foundation Services (GFS): led the development of cloud optimized servers to replace industry standard servers resulting in lower TCO (power & purchase price). He left Microsoft as Chief Architect for GFS, focused on driving new technology initiatives that advance the energy efficiency of Microsoft’s cloud infrastructure.

Prior to joining Microsoft, Dileep was director of advanced architecture in the CTO Office of Intel’s Digital Enterprise Group and a lead spokesperson for evangelizing Intel server platform technologies to the industry and financial analysts. He was an Intel Distinguished Lecturer for several years. At Intel, he established architecture direction for new workstation business. He championed the establishment of a power optimized microprocessor design for mobile computing as part of Intel’s Centrino Mobile Technology; drove the strategic decision to implement AMD compatible 64-bit x86 architecture and pioneered the adoption of energy-efficient microprocessor cores across Intel’s product line. He led the definition of server microprocessor products based on multiple low power mobile cores.

Prior to Intel, Dr. Bhandarkar spent almost 18 years at Digital Equipment Corporation, where he managed processor and system architecture, and performance analysis work related to the VAX, Prism, MIPS, and Alpha architectures.

He also worked at Texas Instruments for four years in their research labs in a variety of areas including magnetic bubble memories, charge coupled devices, fault tolerant memories, and computer architecture.

Dr. Bhandarkar holds 16 U.S. patents and has published more than 30 technical papers in various journals and conference proceedings. He is also the author of a book titled “Alpha Implementations and Architecture.”

In 1997, he was elected an IEEE Fellow for contributions and technical leadership in the design of complex and reduced instruction set architecture and in computer system performance analysis.

In 1998, he was recognized as a distinguished alumnus of the Indian Institute of Technology, Bombay, where he received his B. Tech in electrical engineering in 1970.

M.S. and Ph.D. in electrical engineering from Carnegie Mellon University.